### 53. Consider a storage disk with 4 platters (numbered as 0, 1, 2 and 3), 200 cylinders (numbered as 0, 1, …., 199) and 256 sectors per track (numbered as 0,1, ….., 255). The following 6 disk requests of the form [sector number, cylinder number, platter number] are received by the disk controller at the same time: [120, 72, 2], [180, 134, 1], [60, 20, 0], [60, 20, 0], [212, 86, 3], [56, 116, 2], [118, 16, 1] Currently the head is positioned at sector number 100 of cylinder 80 and is moving towards higher cylinder numbers. The average power dissipation in moving the head over 100 cylinders is 20 milliwatts and for reversing the direction of the head movement once is 15 milliwatts. Power dissipation associated with rotational latency and switching of head between different platters is negligible. The total power consumption in milliwatts to satisfy all of the above disk requests using the Shortest Seek Time First disk scheduling algorithm is ____________.

### 54. A processor has 16 integer registers (R0, R1, …… R15) and 64 floating point registers (F0, F1, ……, F63). It uses a 2-byte instruction format. There are four categories of instructions. Type-1, Type-2, Type-3 and Type-Type-1 category consists of four instructions, each with 3 integer register operands (3Rs). Type-2 category consists of eight instructions, each with 2 floating point register operands (2Fs). Type-3 category consists of fourteen instructions, each with one integer register operand and one floating point register operand (1R + 1F). Type-4 category consists of N instructions, each with a floating point register operand (1F).
The maximum value of N is _________.

### 55. Consider the following undirected graph G:

### 56. Consider the minterm list form of a Boolean function F given below.

### 57. The instruction pipeline of a RISC processor has the following stages. Instruction Fetch (IF), Instruction Decode (ID), Operand Fetch (OF), Perform Operation (PO) and Writeback (WB). The IF, ID, OF and WB stages take 1 clock cycle each for every instruction. Consider a sequence of 100 instructions. In the PO stage, 40 instructions take 3 clock cycles each, 35 instructions take 2 clock cycles each, and the remaining 25 instructions take 1 clock cycle each. assume that there are no data hazards and no control hazards. The number of clock cycles required for completion of execution of the sequence of instructions is ____________.

### 58. Let G be a graph with 100! Vertices, with each vertex labeled by a distinct permutation of the numbers 1, 2, …. There is an edge between vertices u and v if and only if the label of u can be obtained by swapping two adjacent numbers in the label of v. Let y denote the degree of a vertex in G and z denote the number of connected components in G. Then, y + 10z = _________.

### 59. Given a language L, define L i as follows:

### 60. The number of possible min-heaps containing each value from {1, 2, 3, 4, 5, 6, 7} exactly once is _______.