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Important questions about Digital Design. Digital Design MCQ questions with answers. Digital Design exam questions and answers for students and interviews.

Options

A : reset

B : set

C : toggle

D : dual

2. What is the difference between setup time and hold time?

Options

A : Setup time occurs after the active clock edge, hold time occurs before the active clock edge.

B : Setup time occurs before the active clock edge, hold time occurs after the active clock edge.

C : Setup time and hold time both occur at the active clock edge.

D :

3. Which of the following circuit parameters would be most likely to limit the maximum operating frequency of a flip-flop?

Options

A : setup and hold time

B : clock pulse HIGH and LOW time

C : propagation delay time

D : clock transition time

Options

A : yes

B : no

C :

D :

Options

A : True

B : False

C :

D :

6. The purpose of a pull-up resistor is to keep a terminal at a ________ level when it would normally be at a ________ level.

Options

A : LOW, float

B : HIGH, float

C : clock, float

D : pulsed, float

7. Why does the data sheet for the 7476 only give a minimum value for the clock pulse width (both HIGH and LOW)?

Options

A : nominal value

B : best-case condition

C : worst-case condition

D :

8. A Schmitt trigger:

Options

A : has two trip points

B : is a zero crossing detector

C : has positive feedback

D : has two trip points and positive feedback

Options

A : 0.4 volt

B : 0.6 volt

C : 0.8 volt

D : 1.2 volts

10. Why should a LED be pulled LOW from a logic gate rather than pulled HIGH?

Options

A : LOW-level current is smaller.

B : LOW-level current is larger.

C : HIGH-level current is larger.

D : LOW-level current is smaller and HIGH-level current is larger.

1. Define a race condition for a flip-flop.

Options

A : The inputs to a trigger device are changing slightly before the active trigger edge.

B : The inputs to a trigger device are changing slightly after the active trigger edge.

C : The inputs to a trigger device are changing at the same time as the active trigger edge.

D :

2. Which of the following flip-flop timing parameters indicates the time it takes a Q output to respond to a C p input?

Options

A : t s , t h

B : t PHL , t PLH

C : t w (L), t w (H)

D : f max

3. The main concern when using a pull-down resistor is:

Options

A : the low power dissipation of the resistor

B : it will keep a floating terminal LOW

C : the high power dissipation of the resistor

D : it will cause false triggering

4. What is the major advantage of the J-K flip-flop over the S-R flip-flop?

Options

A : The J-K flip-flop is much faster.

B : The J-K flip-flop does not have propagation delay problems.

C : The J-K flip-flop has a toggle state.

D : The J-K flip-flop has two outputs.

5. The ________ circuit overcomes the problem of switching caused by jitter on the inputs.

Options

A : astable multivibrator

B : monostable multivibrator

C : bistable multivibrator

D : Schmitt trigger

Options

A : 7.02 mA

B : 8.51 mA

C : 10.63 mA

D : 5.32 mA

7. One example for the use of a Schmitt trigger is as a(n):

Options

A : switch debouncer

B : racer

C : astable oscillator

D : transition pulse generator

Options

A : racing

B : toggling

D : pulse timing

Options

A : True

B : False

C :

D :

Options

A : True

B : False

C :

D :