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Arithmetic Operations And Circuits Online Exam Quiz

Important questions about Arithmetic Operations And Circuits. Arithmetic Operations And Circuits MCQ questions with answers. Arithmetic Operations And Circuits exam questions and answers for students and interviews.

1. The range of an 8-bit two's complement word is from:

Options

A : +128 10 to ?128 10

B : ?128 10 to +127 10

C : +128 10 to ?127 10

D : +127 10 to ?127 10

2. How many basic binary subtraction operations are possible?

Options

A : 4

B : 3

C : 2

D : 1

3. How many basic binary subtraction combinations are possible?

Options

A : 4

B : 3

C : 2

D : 1

4. Two half adders can be combined to form a full adder with no additional gates.

Options

A : True

B : False

C :

D :

5. A technique to speed parallel addition by eliminating the delay caused by the carry bit propagation is called fast carry, or look-ahead carry.

Options

A : True

B : False

C :

D :

6. Signed binary numbers have one bit that represents the sign, with the remaining bits representing the magnitude.

Options

A : True

B : False

C :

D :

7. If you borrow from a position that contains a 0, you must borrow from the more significant bit that contains a 1. All 0s up to that point become 1s, and the digit last borrowed from becomes a 0.

Options

A : True

B : False

C :

D :

8. Using the two's complement number system we can add numbers with like signs and obtain the correct result.

Options

A : True

B : False

C :

D :

9. End around carry is an operation in 1's complement subtraction where a 1 is added to the sum of the 1's complement of both numbers.

Options

A : True

B : False

C :

D :

10. A full adder adds three bits, a half adder adds 1-1/2 bits.

Options

A : True

B : False

C :

D :

1. The operands in a subtraction operation are the subend and the minuend.

Options

A : True

B : False

C :

D :

2. The operands in an addition operation consist of the augend and the addend.

Options

A : True

B : False

C :

D :

3. The 2's complement of 110110 2 is _________.

Options

A : 110100 2

B : 101010 2

C : 001011 2

D : 001010 2

4. A full adder adds ____.

Options

A : two 2-bit binary numbers

B : two 4-bit binary numbers

C : two single bits and one carry bit

D : two 2-bit numbers and one carry bit

5. The carry propagation delay in 4-bit full-adder circuits ____________.

Options

A : is normally not a consideration because the delays are usually in the nanosecond range

B : is cumulative for each stage and limits the speed at which arithmetic operations are performed

C : decreases in direct ratio to the total number of full-adder stages

D : increases in direct ratio to the total number of full-adder stages, but is not a factor in limiting the speed of arithmetic operations

6. All digital systems that perform arithmetic operations must indicate _______ and ________ for numbers.

Options

A : size, base

B : sign, magnitude

C : sign, base

D : magnitude, base

7. An input to the mode pin of an arithmetic-logic unit (ALU) determines if the function will be _________.

Options

A : one's complemented

B : positive or negative

C : with or without carry

D : arithmetic or logic

8. In binary number systems the sign of a number is indicated by _________.

Options

A : using a 0 (zero) bit in front of negative numbers

B : inverting the bits if the number is negative

C : including a sign bit along with the magnitude bits

D : placing a negative sign in front of the number

9. Two 4-bit adders could be cascaded to form a(n) ___________.

Options

A : 16-bit parallel-adder circuit

B : 8-bit parallel-adder circuit

C : full-adder circuit

D : arithmetic-logic unit

10. One advantage of using the 2's complement system to represent signed numbers is that you ___________.

Options

A : can perform subtraction by performing addition

B : can perform addition by performing subtraction

C : can perform division through repeated subtraction

D : none of the above

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